Detailed explanation of circuit diagram design of three classic topological circuit diagrams

In this article, the topology of buck, boost and buck-boost will be introduced from different aspects.
Step down converter
Figure 1 is the schematic diagram of asynchronous buck converter. The buck converter reduces its input voltage to a lower output voltage. When the switch Q1 is turned on, the energy is transferred to the output terminal.
Figure 1: Schematic diagram of asynchronous buck converter
1 Formula to calculate the duty cycle:
2 Formula to calculate the maximum stress of metal oxide semiconductor field effect transistor (MOSFET):
Equation 3 gives the maximum diode stress:
Where Vin is the input voltage, Vout is the output voltage, and Vf is the diode direct voltage.
Compared with linear regulator or low dropout regulator (LDO), the greater the difference between input voltage and output voltage, the higher the efficiency of buck converter.
Although the buck converter has pulse current at the input, the output current is continuous because the inductor-capacitor (LC) filter is located at the output of the converter. As a result, the voltage ripple reflected to the input terminal will be larger than the ripple at the output terminal.
For buck converters with small duty cycle and output current greater than 3A, it is recommended to use synchronous rectifier. If your power supply requires an output current greater than 30A, it is recommended to use multiphase or staggered power stages, because this can minimize the stress of components, disperse the heat generated among multiple power stages, and reduce the reflected ripple at the input of the converter.
The duty cycle is limited when N-FET is used, because the bootstrap capacitor needs to be recharged every switching cycle. In this case, the maximum duty cycle is in the range of 95-99%.
Buck converters usually have good dynamic characteristics because of their forward topology. The achievable bandwidth depends on the quality of the error amplifier and the selected switching frequency.
Figs. 2 to 7 show the voltage and current waveforms of FET, diode and inductor in the asynchronous buck converter in continuous conduction mode (CCM).  
Boost converter
The boost converter boosts its input voltage to a larger output voltage. When the switch Q1 is not conducting, the energy is transferred to the output terminal. Fig. 8 is a schematic diagram of an asynchronous boost converter.
Figure 8: Schematic diagram of asynchronous boost converter
4 Formula to calculate the duty cycle:
5 Formula to calculate the maximum MOSFET stress:
Equation 6 gives the maximum diode stress:
Where Vin is the input voltage, Vout is the output voltage, and Vf is the diode direct voltage.
With the boost converter, you can see the pulse output current because the LC filter is located at the input. Therefore, the input current is continuous and the output voltage ripple is larger than the input voltage ripple.
When designing a boost converter, it is important to know that there will be a permanent connection from the input to the output even if the converter is not switching. Precautions must be taken to prevent possible short-circuit events at the output.
For output current greater than 4A, synchronous rectifier should be used instead of diode. If the power supply needs to provide more than 10A output current, it is strongly recommended to adopt multiphase or staggered power stage mode.
When working in CCM mode, the dynamic characteristics of boost converter are limited by the right half plane zero point (RHPZ) of its transfer function. Since RHPZ cannot be compensated, the achievable bandwidth will usually be less than one-fifth to one-tenth of the frequency of RHPZ. See equation 7:
Where Vout is the output voltage, D is the duty cycle, Iout is the output current, and L1 is the inductance of the boost converter.
Figs. 9 to 14 show the voltage and current waveforms of FET, diode and inductor in asynchronous boost converter in CCM mode.
Buck-boost converter
A buck-boost converter is a combination of buck and boost power stages, sharing the same inductor. See figure 15.
Figure 15: Schematic diagram of two-switch buck-boost converter
The buck-boost topology is practical because the input voltage can be smaller, larger or the same as the output voltage, and the output power needs to be greater than 50W.
For output power less than 50W, single-ended primary inductor converter (SEPIC) is a more cost-effective option because it uses fewer components.
When the input voltage is greater than the output voltage, the buck-boost converter works in buck mode; When the input voltage is less than the output voltage, it works in boost mode. When the converter works in the transmission region where the input voltage is within the output voltage range, there are two concepts to deal with these situations: either the buck and boost stages are effective at the same time, or the switching cycle alternates between the buck and boost stages, each of which usually runs at half the normal switching frequency. The second concept can cause subharmonic noise at the output, while the accuracy of the output voltage may be less accurate than the conventional buck or boost operation, but the converter will be more effective than the first concept.
The buck-boost topology has pulse currents at both input and output terminals, because there is no LC filter in either direction.
For buck-boost converter, the buck and boost power levels can be calculated separately.
The buck-boost converter with two switches is suitable for the power range between 50W and 100W (such as LM5118), and the synchronous rectification power can reach 400W (the same as LM5175). It is recommended to use the synchronous rectifier with the same current limit as the uncombined step-down and step-up power stages.
You need to design the compensation network of buck-boost converter for boost stage, because RHPZ will limit the bandwidth of regulator. If you don’t understand the design of circuit diagram, you can contact customer service for consultation, and there is also the business of drawing circuit diagram.