With the pitch of ball grid array package (BGA) decreasing from 1.0mm to 0.8mm, 0.4mm or even smaller, the technological development of component packaging industry is obvious. At the same time, it becomes more and more difficult to fan out and route the dense circuits related to these components. At present, high-density interconnect (HDI) method is usually used to complete the fanout of these components, and the thinnest traces are constructed by subtractive etching process and via holes to realize the connection or escape of the inner layers of PCB.
Now, the wiring problem can be solved by a new manufacturing process. And additive process semi-additive process process can easily and reliably manufacture the line width and pitch below 0.075mm This technology brings new challenges. Engineers and designers need to know clearly the difference between the standard subtractive process and the new additive process process, the different design requirements of the two processes for trace impedance, and the influence of denser wiring on signal integrity.
Contrast reduction process with additive process process.
First, compare the two processes from a simple macro perspective. The subtractive process starts with the substrate on which a copper base layer with a certain thickness has been laminated to manufacture PCB, and then copper is deposited on the outer layer of the circuit board, including drilling holes and vias, by chemical plating. Then, the design pattern is applied, the exposed traces and vias are electroplated with a resist, and then etched. Etching to remove the copper in the area without circuit pattern is the process of subtractive process, and it is also its limited process. If copper is etched vertically downward, the etchant will also etch and remove copper in the horizontal direction under the applied design pattern. From the profile, the trace formed by the subtractive process is trapezoidal. A serious hidden danger is that if the height of the trace is half the width, the trace may be etched away.
The additive process process is similar to 3D printing. The construction of PCB starts from the laminate material without copper, and the wiring is “laminated” on the thin seed layer or thin copper foil of electroless copper plating. Additive process technology can not only reduce the line width and pitch to 0.010mm, but also make the routing profile rectangular.
It is with this manufacturing process that a complete trace is formed, and the concern is turned to trace impedance. According to the calculated impedance, the final value is based on the width of the formed trace and the height of the trace from its reference return path. Whether the structure is stripline or microstrip line, it will certainly have some influence. The general subtractive etching process can easily form a trace with impedance of 50Ω and width of 0.075mm by using 0.050mm thick dielectric material between the trace and its return path surface. However, once we need to make traces smaller than 0.050mm like the additive process process, the subtractive etching process can hardly meet the demand, and the thickness of the dielectric material has to be further reduced to keep the impedance of 50Ω. That’s the problem. If there are ultra-thin materials on the market, the supply will be very exclusive and the cost will be very high.
Although the coplanar waveguide method can slightly improve the trace impedance, the thickness of dielectric material still plays a key role in the final impedance.
Impact on signal integrity
In order to give a comprehensive overview of additive process design, we need to measure the impact of this kind of design on signal integrity. The reason why this micro-trace is used is to increase the density of the design and help to lay out dense components. As the trace width decreases to the micro level, it is necessary to improve the ability to distribute more traces in a smaller area. Through the impedance test, it is known that the distance between the copper layer and the return path is still the same as before due to the limitation of the thickness of the dielectric material. This means that the field generated by the final signal flowing through the traces is still the same as before, but in order to increase the design density, the distance between adjacent traces in the field has been made closer.
It is easy to conclude that increasing wiring density will only increase the possibility of crosstalk and other signal integrity problems. In order to overcome the possible crosstalk problem, it is necessary to distribute the traces in a wider area as much as possible, and make the return path as close as possible to the traces. If you want to make the traces closer together, you need to reduce the parallel directions as much as possible by fanning out. Also, it is necessary to combine the traces belonging to the same interface, which will help to strengthen noise immunity.
After knowing this knowledge, how can designers and engineers adopt this new manufacturing technology in their design? The first thing to do is to communicate with the manufacturer. Now there are different additive process processes on the market, such as A-SAP (semi-additive process process of Averatek Company) and mSAP (improved semi-additive process process). Each method has its own potential in processing from the width of the route to the height of the route. Therefore, it is necessary to know the manufacturing capacity of the manufacturer before designing the appropriate technical indicators. Now, the additive process design can realize wider routing, just as the subtractive process can realize routing less than 0.075mm. The manufacturer’s manufacturing capacity defines the minimum trace width that can be realized, and the trace width of 0.075mm is the turning point to consider adopting additive process design technology.
According to experience, the design of traces constructed by additive process process is most suitable for fan-out with high density or micro-component packaging. This technology can contact more component pins without increasing the number of PCB layers, thus producing more reliable PCB with lower cost. However, we should pay attention to the fact that in the packaging area, the line width and line spacing should be increased whenever the wiring can be carried out without restriction. Therefore, it is allowed that the impedance of most conventional traces on the PCB and the small fan-out area in the package area are slightly mismatched.
New wiring method
When wiring PCB in additive process, designers may have to change their thinking mode and can no longer use the traditional wiring method. Generally, when the shape, lamination and limiting factors of PCB are specified in the design, each block or part will be placed and wired to the outer layer of PCB, and the inner layer of PCB will be used to connect as many different wiring areas as possible. After the additive process design is used, the coplanar waveguide can be used to increase the wiring density of the outer layer of PCB and make full use of each layer, thus reducing the number of boards and vias.
conclusion
Compared with the traditional subtractive etching process, additive process process and semi-additive process process have many advantages. Including the line width and line pitch of 0.010mm, which is much thinner than that of any subtractive process, and can also form a vertical profile. Increased density also means increased crosstalk and other signal integrity problems.
Additive process and semi-additive process are likely to become more mainstream technologies. All designers or design engineers can design the PCB made by additive process process with a little planning.
