What problems should be paid attention to in the pcb Layout of mobile phones, and do the display parts need to be wired?
1: device device
Layer2： signal Most of the address and data signal, and some analog lines (corresponding to the ground of layer 3).
Layer3： GND part of the wiring (including the keyboard surface and the wiring that can’t walk on the second floor), GND
Layer4: The stripline shall pass through the baseband analog control lines (txramp_rf, afc_rf) of the radio frequency, the audio line, the analog interface line between the baseband main chips, and the main clock line.
Layer5： GND GND
Layer6: power supply layers VBAT, LDO_2V8_RF(150mA), VMEM(150mA), VEXT(150mA), VCORE(80mA), VABB(50mA), VSIM(20mA), VVCXO(10mA)
Route of Layer7： signal keyboard surface
Layer8: device device
Specific PCB wiring requirements
1. General principle:
Wiring sequence: RF strip line and control line (at antenna)-baseband RF analog interface line (txramp_rf, AFC _ RF)-baseband analog line includes audio line and clock line-analog baseband and digital baseband interface line-power line-digital line.
2. Wiring requirements of RF stripline and control line
RFOG and RFOD networks are striplines of the fourth layer, with a line width of 3mil. The upper and lower layers are covered with land, and the width of striplines is determined according to the actual plate thickness and routing length. As the striplines need to be drilled with 2 ~ 7 holes, pay attention to the ground cover of the bottom layer near these holes, and the wiring of other layers should not be too close to these holes;
RX_GSM, RX_DCS and RX_PCS networks are the top radio frequency receiving signal lines, with a line width of 8 mil. RFIGN, RFIGP, RFIDN, RFIDP, RFIPN and RFIPP networks are the top and second layer RF receiving signal lines, and the line width of the fixed layer is 8mil, while that of the second layer is 4 mil.
GSM_OUT, DCS_OUT, TX_GSM, TX_DCS/PCS networks are the top power amplifier output and transmission signal lines, and the line width should be 12mil.
The antenna outputs to the top signal lines ANT_1, ANT_2, ANT_3, ANT of the test stand and antenna contacts, and the appropriate line width is 12mil.
3. Analog line with RF interface (four layers)
The wiring of TXRAMP_RF and AFC_RF networks should be as thick as possible, surrounded by ground lines on both sides, with a line width of 6mil；;
QN_RF、QP_RF； IN_RF and IP_RF are two pairs of differential signal lines. Please make sure that the line lengths are as equal as possible and the spacing is as equal as possible. The line width on the fourth layer is 6mil.
4. Important clock lines (take four floors)
The 13MHz crystal U108 and the Shi Ying crystal G300 are noise sensitive circuits, so please minimize the signal wiring below.
When the two terminals OSC32K_IN and OSC32K_OUT of Shi Ying crystal G300 are routed in parallel, the closer to D300, the better. Please note that the input and output lines of the 32K clock must not cross.
The wiring of SIN13M_RF, CLK13M_IN, CLK13M_T1, CLK13M_T2, CLK13M_IN_X and CLK13M_OUT networks should be as short as possible, and both sides should be surrounded by grounding lines. The adjacent two layers of wiring should be grounded.
The clock is recommended to go 8mil.
5. The following baseband analog lines (four layers)
The following are 8 pairs of differential signal lines:
RECEIVER_P、RECEIVER_N； SPEAKER_P、SPEAKER_N； HS_EARR、 HS_EARL ；HS_EARR_T1、 HS_EARL_T1 ；HS_MICP、HS_MICN；MICP、MICN；USB_DP、USB_DN；USB_DP_T1、USB_DN_T1；USB_DP_X、USB_DN_X；
To avoid phase error, the line lengths should be as equal as possible, and the spacing should be as equal as possible.
BATID is AD sampling analog line, please go 6 mil;
The four analog lines TSCXP, TSCXM, TSCYP and TSCYM also follow the differential signal line. Please take 6mil.
6. Agnd and GND distribution (? )
AGND and GND networks are not connected together in the schematic diagram. After the layout is completed, they are connected with copper foil. The specific locations are as follows:
The analog ground AGND is laid at the bottom of D301 chip. The analog ground AGND and the digital ground GND are connected near AGND(PIN G5) of D301.
The bottom of D400 chip is laid with MIDI analog ground MIDIGND, and MIDI analog ground MIDIGND and digital ground GND are connected near pin 16 of D400.
AGND is better above 50mil.
8. Important interface line between digital baseband and peripheral devices
LCD_RESET, SIM_RST, CAMERA_RESET, MIDI_RST, NFLIP_DET, MIDI_IRQ, IRQ_CAMERA_IO, IRQ_CAMERA_IO_X and PENIRQ are reset signals and interrupt signals. Please take at least 6mil lines.
POWE_ON/OFF take at least 6mil line.
7. Important interface line between digital baseband and analog baseband:
VSDI, VSDO, VSFS, BSIFS, BSDI, BSDO, BSOFS, ASDI, ASFS and ASDO are high-speed data lines. The lines are as short and wide as possible (more than 6mil), and copper is coated around the lines.
BUZZER, ASM, ABB_INT, RESET and ABB_RESET are important signal lines. Please take at least 6mil lines, which are short and coated with copper around them.
9. Power supply:
(1) power signal with high load current (six floors): the load current of the following power signals decreases in turn, and it is better to divide them in the power layer: CHARGE_IN, VBAT, LDO_2V8_RF(150mA), VMEM(150mA), VEXT(150mA), VCORE(80mA) and VABB(50mA).
(2) Power signal with low load current: VRTC and VMIC have low current and can be distributed in signal layer.
(3) Charging circuit: VBAT and CHARGE_IN connected to XJ600, and ISENSE power transmission line connected to VT301, which has a large current, please make the line wider. 16mil is recommended.
(4) Keyboard backlight: KB_BACKLIGHT, KEYBL_T1 have 50mA current, and R802~R809, VD801~VD808 have 5mA current, so pay attention when wiring.
(5) Motor drive: the current flowing through the VIBRATOR and VIBRATOR_x network is 100mA.
(6)LCD backlight driving: the current of LCD_BL_CTRL and LCD_BL_CTRL_X network is 60mA.
(7) Seven-color lamp backlight driving: LPG_GREEN, LPG_RED, LPG_BLUE, LPG_RED_FPC, LPG_BLUE_FPC, LPG_RED_FPC_x, LPG_GREEN_FPC _ x, LPG_BLUE_FPC_x network current is 5mA. The current flowing through LPG_OUT is 20mA, so it is recommended to go over 8 mil, and stay away from analog signal wiring and vias.
10. about EMI wiring
(1) Before reaching XJ700, the output networks of Z701, Z702 and Z703 should walk on the inner floor, and try to walk on the second floor. Then, make holes via2~1 near the XJ700 pin and hit the TOP floor.
(2) The networks LPG_RED_FPC_x, LPG_GREEN_FPC_x, LPG_BLUE_FPC_x, VIBRATOR_x, NCS_MAIN_LCD_x, NCS_SUB_LCD_x and ADD01_x coming out of RC filtering should walk in the inner layer before reaching XJ500.
(3) The network of keyboard matrix can’t be routed on the eighth floor. Try to walk on the seventh floor. If you can’t walk on the seventh floor, you can walk to the third floor.
(4) The wiring of the earphone parts at the bottom and top of the keyboard face should be at the 8th floor as little as possible. I hope the keyboard surface can be paved in a large area by then.
(5) Lay the floor under the 5)SIM card XJ601 (on the surface layer) as much as possible, and take fewer signal lines.
11. The peripheral shielding strips of components are 0.7mm, the spacing between shielding strips is 0.3mm, and the pad is 0.4mm away from the shielding strips. This position has been reserved.
12. There are two BGA devices in the baseband. Since BGA conductive adhesive can only drip from one direction, the RF surface is the front, and a dripping position of 0.7mm is uniformly left on the left side of BGA.
13．20H principle. The power plane is indented by 20H compared with the ground plane.
14. Via size: 0.3mm/0.1mm for the first to second layers, 0.55mm/0.25mm for the other layers.
15. The edge of the top PCB should have a 1.5-2mm wide grounding strip and punch holes.
16. After copper plating, connect the ground of each layer with holes.
17. Pay attention to the adjacent layers to avoid parallel routing as much as possible, especially for the fourth layer, and be especially careful when routing the third layer.
