“High-speed backplane and high-speed backplane connector” is mentioned in “The culprits in several high-speed PCB designs”. So how is the high-speed backplane designed? What are the design steps from beginning to end? What are the key points in each stage? The case analysis of the current period is summarized.
High-speed backplane design process
The detailed high-speed backplane design process, apart from following the IPD (Commodity Integrated Development and Design) steps, has certain uniqueness, which is different from the general hardware configuration PCB control module development process. The key point is that the backplane is closely related to the commodity hardware configuration architecture, and it is closely related to the whole equipment frame structure design, besides the signal socket of each hardware configuration control module in the system software.
The design process of high-speed backplane includes the following design stages:
Important content of each stage of high-speed backplane design process
1. Important technical demonstration
Besides the design factors of backplane PCBA, the design of high-speed backplane must also be concerned with the design of high-speed signal interconnection routing protocols of all system software. For typical high-speed signal routing protocols, please refer to the following figure:
Therefore, sufficient technical demonstration must be done early, and the key points include:
① Model selection of integrated icSerDes and capability verification of high-speed signal driver (the simulation analysis can also show reference, but if the integrated icSerDes has Demo board that can be tested, it is more strongly recommended to test and certify)
② Model selection and certification of high-speed connectors (focusing on the time domain and frequency domain index values of connectors, whether the characteristics of the highest-speed signal transmission of product systems can be considered, generally by designing “connector SI detection board”)
③PCB board type selection (the routing protocol of system software includes PCB wiring of daughter cards on both sides and PCB wiring of backplane, and the characteristics of PCB board immediately endanger the loss of routing protocol, so the LowDk/Df board that is suitable for specifications and models must be clearly defined)
2. Hardware configuration architecture design
① Function and total number of each double-board control module of system software
The total data information exchange capacity of the system software determines the single slot data information capacity and the total number of business process daughter cards in the system software.
The total number of other sub cards in the system software, such as the total number of key exchange sub cards, the total number of master chip sub cards, the total number of switching power supply / cooling fan modules of the whole equipment, etc.
② Model, specification and total number of socket connectors for each control module and backplane
According to the total number of signals, the actual model selection of each module interface connector is decided
③ The frame design related to the frame design of the whole equipment
The design of the main power supply card, the software design of the power supply slot and the power pipe sub-system
3. Overall design plan
The early important technical demonstration and hardware configuration architecture design clear design completion plan, the overall design plan of the backplane text document is generated, and the pre simulation simulation analysis of high-speed signal routing protocol is also done
4. PINMAP design
This link has already entered the detailed design and completion of the backplane. Because the backplane has signal sockets with each hardware configuration sub-control module in the product system, it is necessary to establish the definition method of all socket signals on socket connectors, similar to PINMAP of integrated ic pins.
On the one hand, the design of backplane PINMAP must focus on the crosstalk manipulation of high-speed interface signals (for example, one GND signal or two GND signals must be separated between signals); On the other hand, we must be concerned about the completion of PCBLayout design (generally, the PCB wiring on the backplane must be smooth, and the number of superimposed layers on the high-speed backplane is generally high. If the signal definition is distorted, the number of superimposed layers on the PCB design will be doubled)
Circuit schematic design
The design of circuit schematic diagram of backplane is relatively simple, and PINMAP can be immediately converted into circuit schematic diagram according to the script of self-developed tool software.
5. PCB design
The early PCB design work is done well, and there is generally no excessive difficulty coefficient when the backplane PCB design is completed. It is only necessary to carry out the connection according to the clear wiring standard. The most important thing is to ensure the current-carrying working ability of the power supply system of the system software switching power supply.
6. UT detection
The UT unit test paper focuses on the SI characteristics of the high-speed signal security channel of the backplane. At this time, will the connector test board be used as the test aid?
7. System software integration test
The whole process of software integration testing will take a long time. Because the backplane itself and each hardware configuration sub-control module have sockets, there will be many detection scenarios under different arrangements and combinations, such as: the communication between the exchange sub-card and the business process sub-card, the communication between the main control chip sub-card and the business process sub-card, and the communication between the main control chip sub-card and the whole equipment sub-control module.
The testing of the whole commodity equipment, such as high and low temperature test, temperature circulation system, reliability test, etc., also requires the backplane development and design staff to participate in the precise positioning reliability test.
