HI3521D HiSilicon original development board introduces processor core ARMCortexA7 dual-core @Max.1.3GHz32KBL1I-Cache, 32KBL1D-Cache256KBL2Cache supports NEON/FPU multi-protocol video codec H.265MainProfile,Level5.0 encoding H.265MainProfile, The Level5.0 decoding H.264beline/main/highprofilelevel 5.1 encoding H.264beline/main/highprofilelevel 5.1 decoding MPEG-4SP, L0~L3/ASPL0~L5 Decoding MJPEG/JPEGBaseline Coded Video Codec Processing H.265/H.264&JPEG Multi-stream Codec Performance: H.265/H.264 Coding H.265/H.264 Decoding JPEG Coding H.265/H.264 H.264 decoding JPEG encoding H.265/H.264 encoding H.265/H.264 decoding JPEG encoding H.265/H.264 decoding H.265/H.264 decoding JPEG decoding supports CBR/VBR/AVBR/FIXQP/QPMAP five code rate control modes, and the highest output code rate is 40Mbps, which supports the region of interest.
An integrated intelligent analysis acceleration engine supporting color-to-gray coding intelligent video analysis,It supports intelligent motion detection, perimeter defense, video diagnosis and other intelligent analysis applications. Video and graphics processing supports pre-and post-processing such as de-interlace, sharpening, 3D denoising, dynamic contrast enhancement, mosaic processing, anti-flicker processing of video and graphics output, 1/15 ~ 16x scaling of video, 1/2 ~ 2x scaling of graphics, 4 occlusion areas and 8 OSD superimposed audio editing.Hardware implements multi-protocol audio coding by decoding, and supports ADPCM, G.711 and G.726 software to implement multi-protocol audio coding and decoding security engine. Hardware implements AES/DES/3DES encryption and decryption algorithm video interface. Video input interface supports four 8-bit interfaces or two 16-bit interfaces. Each 8-bit interface supports 108/144 MHz four channels of D1/960H, time division multiplexing input, and totally supports 16xD1/16x960H real-time video input.Total support for real-time video input: each 8bit interface supports 148.5MHz double-edge sampling or 297MHz single-edge sampling to realize four channels of 720p time division multiplexing input, and each 8bit interface supports 148.5MHzBT.1120Y/C interpolation mode input, and each 8bit interface supports two channels of 1080p time division multiplexing input through 148.5MHz double-edge sampling or 297MHz single-edge sampling.Total support for real-time video input. Each 8bit interface supports one channel of 4M(2560*1440) time division multiplexing input through 148.5MHz double-edge sampling or 297MHz single-edge sampling. Total support for real-time video input. The 16bit interface supports 148.5MHzBT.1120 standard mode, real-time video input and video output interface supports one HDMI1.4b HD output interface, and the maximum output supports one VGA HD output interface.The maximum output supports two independent high-definition output channels (DHD0, DHD1), which can be output through any high-definition interface (HDMI, VGA). DHD0 supports 36-picture output, and the maximum output supports 16-picture output. One CVBS SD output interface supports three full-screen GUI graphics layers of ARGB1555 or ARGB8888, which are used for 2-way HD and 1-way logo respectively. The format is ARGB1888.The maximum resolution is 256×256 audio interface, 3 unidirectional I2S/PCM interfaces, 2 inputs, 16-channel compound input and 1 output, 2-channel output, 16bit voice input and output network interface, 1 Gigabit Ethernet interface, RGMII, RMII and MII interface modes, 10/100Mbit/s half-duplex or full-duplex and 1000Mbit/s full-duplex and TSO. Reduce CPU overhead. Two SATA3.0 peripheral interfaces support PM function, two USB2.0HOST interfaces support eSATA2, and three UART interfaces support Hub function, one of which supports 4-wire and one SPI interface. Two chip selections, one IR interface, one I2C interface, multiple GPIO interfaces, one memory interface, one 32bitDDR3SDRAM controller interface, the highest frequency of 933MHz, ODT function, the maximum capacity of 2GB, automatic power control, SPINOR/NANDFlash interface, 1, 2, 4-wire Spinor/NAND flash, two chip selections, Different types of Flash can be connected separately. For SPINORflash, the maximum capacity of each chip is 64MB. For SPINANDflash, the maximum capacity of each chip is 512MB. For SPINANDflash, the 2KB/4KB page size is supported. For SPINANDflash, Supports 8bit/1KbyteECC and 24bit/ 1KbyteECC has built-in 4KBBootROM and 16KBSRAM with independent power supply. RTCRTC can be independently powered by battery. Multiple boot modes can be configured to support boot from BootROM, boot from SPINORflash and boot from SPINANDflash SDK. Linux3.18-based development kit provides audio codec library with multiple protocols. H.265/ H.264′ s high-performance PC decoding library chip physical specification power consumption of 2.5W typical power consumption supports multi-level power consumption control. The core voltage is 0.9VCPU voltage is 1.0VIO voltage is 3.3VDDR3SDRAM interface voltage is 1.5V packaged RoHS, TFBGA pin pitch: 0.8mm19mmx19mm package size Operating temperature: 0 ~ 70 Chi3521DV100DMEB interface diagram mainly includes: 1. Network RJ45 interface 2.USB2.0 interface X23.HDMI interface X14. Audio output 5. Video input X46.VGA interface 7.SATA interface X28. See HI3521DV100 for other interfaces and introduction of power port. User guide of Demo single board. pd delivery list includes: 1. 1 set of 1.HI3521DV100DMEB board; 2.TTL to RS232 serial cable; 1 3.12V power supply; 4. original software SDK package of HiSilicon (including all schematic diagrams of board +PCB)
