Near-hole problem that can not be ignored in pcb multilayer design

When designing PCB, we consider wiring the most, that is, how to connect each layer with the network signal line in the most reasonable way. The denser the circuit of high-speed PCB, the greater the density of VIA holes, which can play the role of electrical connection between layers. Multi-layer PCB proofing often receives feedback from the board factory that “the hole is too close to the line, which exceeds the process capability”. So, what difficulties will the via hole be in production and what impact will it have on product reliability?
1. Too close two holes will affect the aging of PCB drilling process. When the first hole is drilled, when the second hole is drilled, the material in one direction is too thin, and the stress of the drill nozzle is uneven and the heat dissipation of the drill nozzle is different, which leads to the broken drill nozzle, which affects the efficiency. In severe cases, the PCB hole will collapse and the leakage hole will be electrically disconnected.

2. The wiring in the inner layer of the multilayer board is complicated, and the surrounding environment of the via hole has a high-density wire clamping phenomenon. In case of too close wire clamping or too close hole to hole, the CAM engineer of PCB factory will cut off part of the hole ring when optimizing the document, so as to ensure that the safe distance between the solder ring and the copper or wiring of different networks is greater than 3mil (the required distance varies from factory to factory).
The following six-layer pcb has 6 mils from the inner hole edge to the line edge, 4 mils from the hole ring, and only 2 mils from the ring to the line (Figure 2-1), and the effect after cutting the pad (Figure 2-2).


3. The hole position tolerance of drilling is ≤ 0.05mm. When the tolerance goes to the upper limit, the following situations will occur in the hole ring.
(1) There is an irregular small gap of 360 between the via hole and other elements in the high-density wiring area. To ensure a safe spacing of 3mil, the PAD needs to be cut in multiple directions (Figure 3-1).

(2) According to the data of the source file, the hole edge to the line edge is 6mil, the hole ring is 4mil, and the ring to the line is only 2mil. To ensure the safe distance between the ring and the line is 3mil, it is necessary to cut the 1mil welding ring, and the cut pad is only 3mil. When the hole tolerance offset is 0.05mm (2mil) at the upper limit, only 1mil remains in the hole ring (Figure 3-2).

Figure 3-2
4. PCB production will produce a small amount of deviation in the same direction, and the direction in which the pads are cut is irregular. In the worst case, individual holes will break the solder ring (Figure 4-1).

5. Influence of lamination deviation in multilayer board. Take the six-layer board as an example. Two core boards and copper foil are laminated to form a six-layer board (Figure 5-1). During the pressing process, the deviation of core plate 1 and core plate 2 may be ≤0.05mm, and after pressing, the inner hole will also have an irregular deviation of 360 (Figure 5-2).

To sum up, the drilling process will affect the yield of PCB and its production efficiency; The hole is too small, and there is no complete copper protection around it. The product can pass the open and short circuit test, and it works normally in the early stage, but the reliability problem will occur in the later stage.

Hole-to-hole and hole-to-line spacing of multilayer PCB and high-speed PCB:
(1) multilayer board inner hole to line to copper: 4 layers: 6 layers: ≥6mil 8 layers: ≥7mil 10 layers or more: ≥8mil.
(2) Distance between inner diameter and edge of via hole: same network via hole: ≥8mil(0.2mm), different network via hole: ≥12mil(0.3mm)

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