1.layout design PCB wiring and layout isolation criteria: strong and weak current isolation, large and small voltage isolation, high and low frequency isolation, input and output isolation, and the demarcation standard is one order of magnitude difference. The isolation method includes: the space is far away and the ground wire is separated.
2. The crystal oscillator should be as close to the IC as possible, and the wiring should be thicker.
3. The crystal oscillator shell is grounded.
4. When the clock wiring is output through the connector, the pins on the connector should be covered with grounding pins around the clock line pins.
5. Let the analog and digital circuits have their own power and ground paths respectively. If possible, the power and ground of these two circuits should be widened as far as possible or separate power and ground layers should be adopted, so as to reduce the impedance of the power and ground circuits and any possible interference voltage in the power and ground circuits.
6. The analog ground and digital ground of PCB working alone can be connected in a single point near the grounding point of the system. If the power supply voltages are consistent, the power supplies of analog and digital circuits are connected in a single point at the power supply entrance. If the power supply voltages are inconsistent, a 1~2nf capacitor is connected near the two power supplies to provide a path for the signal return current between the two power supplies.
7. If the PCB is plugged into the motherboard, the power supply and ground of analog and digital circuits of the motherboard should also be separated. The analog ground and digital ground should be grounded at the grounding point of the motherboard, and the power supply should be connected in a single point near the grounding point of the system. If the power supply voltage is consistent, the power supply of analog and digital circuits should be connected in a single point at the power supply entrance. If the power supply voltage is inconsistent, a 1~2nf capacitor should be connected near the two power supplies to provide a channel for the signal return current between the two power supplies.
8. When high-speed, medium-speed and low-speed digital circuits are mixed, different layout areas should be assigned to them on the printed board.
9. The low-level analog circuit and digital logic circuit should be separated as much as possible.
10. In the layout design of multilayer printed boards, the power plane should be close to the ground plane and arranged below the ground plane.
11. In the layout design of multilayer PCB, the wiring layer should be arranged adjacent to the whole metal plane.
12. The digital circuit and analog circuit are separated in the layout design of multilayer printed boards, and the digital circuit and analog circuit are arranged in different layers when conditions permit. If it must be arranged on the same floor, it can be remedied by trenching, adding grounding lines and separating. The analog and digital ground and power supplies should be separated and cannot be mixed.
13. The clock circuit and high-frequency circuit designed by Layout are the main interference and radiation sources, so they must be arranged separately and kept away from sensitive circuits.
14. Pay attention to the waveform distortion during long-distance transmission.
15. To reduce the loop area of interference source and sensitive circuit, the best way is to use twisted pair and shielded wire, so that the signal wire and grounding wire (or current-carrying circuit) are twisted together, so that the distance between signal and grounding wire (or current-carrying circuit) is closest.
16. Increase the distance between lines so that the mutual inductance between the interference source and the induced line is as small as possible.
17. If possible, make the line of the interference source and the induced line at right angles (or close to right angles), which can greatly reduce the coupling between the two lines.
18. Increasing the distance between lines is the best way to reduce capacitive coupling.
19. Before formal wiring, the first thing is to classify the lines. The main classification method is according to the power level, which is divided into several groups every 30dB power level.
20. Wires of different categories should be bundled and laid separately. The adjacent conductors can also be grouped together after shielding or twisting measures are taken. The minimum distance between the classified harnesses is 50 ~ 75 mm.
21. In resistor layout, the gain control resistor and bias resistor (pull-up and pull-down) of amplifier, pull-down and voltage-stabilizing rectifier circuit should be as close as possible to the amplifier, active devices and their power supply and ground to reduce their decoupling effect (improve transient response time).
22. The bypass capacitor is placed near the power input.
23. Decoupling capacitors are placed at the input of power supply, as close as possible to each IC.
24. basic characteristic impedance of PCB: determined by the quality of copper and cross section area. The layout design is as follows: 1 oz. 0.49 mω/unit area
Capacitance: C=EoErA/h, Eo: free space dielectric constant, ER: PCB substrate dielectric constant, A: current reaching range, H: trace spacing
Inductance: evenly distributed in the wiring, about 1NH/m.
In terms of ounces of copper wire, under the rolling of 0.25mm(10mil) thick FR4, the 0.5mm wide and 20mm long wire above the ground layer can produce 9.8mohm impedance, 20nH inductance and 1.66pF coupling capacitance with the ground.
25. Basic principle of PCB wiring: increase the wiring spacing to reduce the crosstalk of capacitive coupling; Lay the power line and ground line in parallel to optimize the capacitance of PCB; Set sensitive high-frequency lines at positions far away from high-noise power lines; Widen the power line and ground line to reduce the impedance of the power line and ground line;
26. Segmentation: Physical segmentation is used to reduce the coupling between different types of signal lines, especially the power supply and the ground line.
27. local decoupling: decouple the local power supply from the IC, filter the low-frequency ripple between the power supply input port and PCB with a large-capacity bypass capacitor to meet the burst power requirements, and use decoupling capacitors between the power supply of each IC and the ground, which should be as close to the pins as possible.
28. Wiring separation: minimize crosstalk and noise coupling between adjacent lines in the same layer of PCB. 3W specification is adopted to deal with key signal paths.
29. Protection and shunt line: the key signals shall be protected by two ground wires, and both ends of the protection line shall be grounded.
30. Single-layer PCB: the ground wire shall be at least 1.5mm wide, and the width change of jumper and ground wire shall be kept to a minimum.
31. Double-layer PCB: grid/dot matrix wiring is preferred, and the width should be more than 1.5mm. Or put the ground on one side and the signal power on the other.
32. Protection ring: a ring is enclosed by land lines to enclose the protection logic for isolation.
33. PCB capacitance: PCB capacitance is generated on the multilayer board due to the thin insulation layer on the power plane and the ground. It has the advantages of very high frequency response and low series inductance uniformly distributed on the whole surface or the whole line. Equivalent to a decoupling capacitor evenly distributed on the whole board.
34. High-speed layout design circuit and low-speed circuit: the high-speed circuit should be close to the ground plane, and the low-speed circuit should be close to the power plane.
Copper filling of the ground: the copper filling must ensure grounding.
35. The routing directions of adjacent layers are in an orthogonal structure, so as to avoid different signal lines going in the same direction in adjacent layers, so as to reduce unnecessary interlayer interference; When the board structure is limited (such as some backboards), it is difficult to avoid this situation, especially when the signal rate is high, it should be considered to isolate each wiring layer by ground plane and each signal line by ground signal line.
36. Wiring with one end floating is not allowed, in order to avoid “antenna effect”.
37. Check rules of impedance matching: the wiring width of the same grid should be consistent, and the change of line width will cause uneven characteristic impedance of the line, and reflection will occur when the transmission speed is high, which should be avoided in the design. Under some conditions, it may be unavoidable to change the line width, and the effective length of the middle inconsistent part should be reduced as much as possible.
38. Prevent signal lines from forming self-loops between different layers, which will cause radiation interference.
39. Short-term rule: the wiring should be as short as possible, especially for important signal lines, such as clock lines, and its oscillator should be placed close to the device.
40. Chamfering rules: acute angles and right angles should be avoided in PCB design, which will cause unnecessary radiation. At the same time, the technological performance is not good, and the included angle between all lines should be greater than 135 degrees.
41. The line from the filter capacitor pad to the connection pad should be connected with a thick line of 0.3mm, and the interconnection length should be ≤ 1.27mm.
42. layout design In general, the high-frequency part is located in the interface part to reduce the wiring length. At the same time, it is also necessary to consider the division of high/low frequency ground plane. Usually, the two ground planes are divided and then connected at the interface.
43. For the area with dense via holes, attention should be paid to avoid the interconnection between the power supply and the hollowed-out area of the stratum, forming the division of the plane layer, thus destroying the integrity of the plane layer, and further leading to the increase of the loop area of the signal line in the stratum.
44. Non-overlapping principle of power layer projection: For PCB boards with more than two layers (including), different power layers should avoid overlapping in space, mainly to reduce the interference between different power sources, especially between some power sources with great voltage difference. The overlapping problem of power planes must be avoided. If it is difficult to avoid, the middle interval stratum can be considered.
45. 3W rule: In order to reduce the interference between lines, the line spacing should be large enough. When the line center distance is not less than 3 times the line width, 70% of the electric fields can be kept from interfering with each other. If 98% of the electric fields do not interfere with each other, the 10W rule can be used.
46. 20H rule: Take one h (the thickness of the dielectric between the power supply and the ground) as a unit. If the power supply is retracted for 20H, 70% of the electric field can be confined to the ground edge, and if the power supply is retracted for 1000H, 98% of the electric field can be confined.
47. The 5th Five-Year Plan: the selection rule of PCB layers, that is, if the clock frequency reaches 5MHZ or the pulse rise time is less than 5ns, the PCB must be multi-layered. If a double-layered board is used, it is best to make one side of the PCB a complete ground plane.
